FPGA Design Engineer IV

FPGA Design Engineer IV

Pasadena, CA

1st shift, 9/80

As a principal-level FPGA Design Engineer, you will lead the planning and execution of highly sophisticated and unique electronics systems with Laboratory wide impact. Specific responsibilities include:

• LeAd, design, and deliver a verified fight-qualified FPGA
• Improve FPGA design flow
• Improve hardware resilience techniques
• Apply digital design knowledge and principles to extremely complex designs
• Mentor junior engineers

This position requires the following qualifications:

• Expert in architecting, designing, implementing, and testing advanced digital systems
• Fluent coding in Verilog and System Verilog
• Extensive experience crafting FPGAs and embedded processors designs using tools: Synplify Pro/Premier, Xilinx Vivado, Microsemi Libero SoC, and Mentor Graphics Questa design suite
• Demonstrated experience leading teams and presenting in design reviews
• Must be successful in leading FPGA/ASIC designs through the full life cycle from initial concept to burn review.
• Success in infusing new design/verification technologies and methodologies
• Skillfully handles fast pace and dynamic product development environment
• An outstanding leader able to build consensus as well as excellent written/verbal communication skills
• Bachelor’s degree in Electronics, Electrical, or Computer Engineering or related discipline with typically a minimum of 9 years of related experience; Master’s in similar disciplines with a minimum of 7 years of related experience; or PhD in similar disciplines with a minimum of 5 years of related experience 
• Experience designing with radiation-tolerant Xilinx and Microsemi FPGAs
• Experience in bus standards protocols such as: SpaceWire, PCI, MILSTD-1553, CAN, and Ethernet
• Embedded Software knowledge and experience
• SystemC or C++, Matlab
• Experience with digital twin modeling
• Familiar with Failure Analysis and worst-case analysis